Improving the drain-current expression of BSIM4 for hot-carrier degradation modeling that is suitable for analog applications

Abstract

The reliability evaluation of MOS transistors is one of the most important subjects in device engineering and VLSI design. The down-scaling of device dimensions adversely affects device reliability and lifetime. Although different factors contribute to device reliability and lifetime, the most influential factor is hot-carrier degradation. Furthermore, hot-carrier degradation affects each application uniquely. In analog applications, hot-carrier degradation is more complex and diverse relative to digital applications. In this study, we improve the BSIM4 drain-current model to develop a hot carrier degradation model that is suitable for both analog and digital applications. Our approach is readily applicable to all process technologies because it depends only on the measured data from fresh and degraded devices. The simulation results of four different process technologies are in excellent agreement with the measured data.