An Ultra Low-Voltage Ultra Low-Power Memristor

Abstract

Memristor can provide new approaches especially in nonlinear & chaotic circuit design. Since no commercially available memristor exist until yet, obtaining of a practical implementation which behaves as a memristor, is very important from the point of view real-world circuit design. In this work, an ultra low-voltage ultra low-power DTMOS-based design of memristor is presented. A new ultra low-voltage, ultra low-power operational amplifier and a new ultra low-voltage, ultra low-power multiplier are also proposed to use in the realization. Our design is composed of these two type active blocks using CMOS 0.18 mu m process technology with symmetric +/- 0.25V supply voltages. Characteristics and performance of our design is verified by PSPICE simulations. Total power consumption of the proposed memristor is found as just 4.3 mu W which is suitable for ultra low-power consumption. The simulation results show that our design provides the characteristics of memristor accurately and it could be a viable and convenient option especially in low-voltage low-power memristor based chaotic applications.